Electro-Optic Polymer Modulators for Use in Integrated Optical Interconnects


Electro-Optic Polymer Modulators for Use in Integrated Optical Interconnects

Todd R. Younkin
Components ResearchMbr/> Intel Corporation


The microprocessor transition from multi-core to many-core will bring about an era of “tera-scale computing,” where chip-to-chip I/O bandwidths of 200GB/s to 1.0TB/s will be needed. To meet these increased demands, traditional electrical interconnects will require the use of complex circuitry and costly materials or face the penalties associated with reducing interconnect link length, reducing signal integrity, or increasing power consumption. Photonic interconnects (PICs), with their promise of terahertz bandwidth, low loss, low cross-talk, and low power consumption, are an attractive alternative to electrical interconnects for these tera-scale computing requirements. [1] We have set out to demonstrate optical I/O with PICs using a fully monolithic, integrated single-mode silicon nitride optical waveguide, silicon nitride waveguide coupled metal-semiconductor-metal (MSM) Ge photodetector, and electro-optical (EO) polymer-based ring-resonator modulator. All of these optical modules are designed to be located on-die with the microprocessor and, therefore, fabricated using a back-end compatible CMOS process flow. The later building block – a compact, low capacitance non-linear optical (NLO) polymer cladding micro-ring resonator modulator – has been successfully fabricated and will be presented herein. Using a simple guest-host NLO polymer made by doping 28 wt% of a FTC-like chromophore into an amorphous polycarbonate (APC), optical modulation has been observed with a low drive voltage, 2.7 Vpp, giving clock signals of up to 10 GHz. [2] While our integration and device optimization efforts continue, the roadmap to operate these devices at > 40 Gb/s with low drive voltage and low power consumption requires the generation of advanced NLO polymers that possess excellent thermal and operational stability (2 hrs @ 250C; 7 yrs @ 100C), large EO activity (r33 > 150 pm/V), low optical loss (< 2 dB/cm), good processibility, and sufficient thermomechanical strength to withstand the back-end compatible CMOS process flow. Unfortunately, when efficient NLO chromophores are doped into high Tg polymer matrices, they tend to pack and form aggregates due to the strong intermolecular electrostatic interactions generated by the large dipole moment of the NLO chromophores. Herein, we will describe our effort at overcoming or preventing these interactions in order to develop EO polymers that can meet our stringent targets. [3]
[1] I. Young, et al., “Optical I/O Technology for Tera-Scale Computing,” ISSCC Dig. Tech. Papers, pp 468 - 470, Feb. 2009.
[2] B. Block, et al., “Electro-optic polymer cladding ring resonator modulators,” Optics Express, vol. 16, no. 22, pp. 18326-18333, Oct. 2008.
[3] Z. Shi, et al., “Controlled Diels-Alder Reactions Used To Incorporate Highly Efficient Polyenic Chromophores into Maleimide-Containing Side-Chain Polymers for Electro-Optics,” Macromolecules, vol. 42, no.7, pp. 2438-2445, 2009.


Speaker Background

Todd performed his undergraduate studies at the University of Florida. Later, he took his interest in organometallics and polymer synthesis westward to Caltech, where he studied catalysis under the direction of Nobel laureate Robert H. Grubbs. He greatly enjoyed being part of a large, multidisciplinary research group with interests related to applications in the chemical, pharmaceutical, electronic, and biomedical industries. Todd has been with Intel in Portland, Oregon, for 8 years. He is currently a member of Intel’s Components Research organization – a wide-ranging group tasked with advancing semiconductor research and nanotechnology. While at Intel, his polymer science contributions have included: pushing the frontier of extreme ultraviolet (EUV) photoresist performance to < 22 nm half-pitch; using electro-optic polymers for integrated high-speed photonic interconnects (PICs); integrating low-k polymer dielectrics into back-end IC processing; introducing novel polymeric materials into both front-end and back-end chemical mechanical polishing (CMP) processes; evaluating ferroelectric polymers for use in non-volatile memory applications; and modifying bio-compatible surfaces for use in implantable medical devices. Todd’s current role is to ensure material readiness for EUV lithography at the 32 nm half-pitch node needed for IC commercialization in 2011 and beyond. In this capacity, he manages both lithography material suppliers and directs a portfolio of competitive research grants. He leverages strong ties with government labs and international consortia such as NIST, SANDIA, CRANN, SEMATECH, and IMEC. Todd serves on the technical program committee for both SPIE Advanced Lithography-Resist Materials and the ACS-PMSE Division.



Wednesday, October 7


Michael's Restaurant at Shoreline Park
2960 N Shoreline Blvd
Mountain View, CA  94043
Directions  Map


6 PM social hour
7 PM dinner
8 PM lecture





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Salmon filet with beurre blanc
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